Dr. Steven Beaty

I wrote a book: https://www.amazon.com/dp/B0DBHH545W

All computer recommendations age pretty quickly, but here are some guidelines.

1. SSD, 512 GB or better. Spinning disks will really slow you down.
2. At least 16 GB of RAM. Anything less will really slow you down, 32 GB if you can afford it.
3. The processor is irrelevant. They’re all plenty good enough for your CS projects.
4. The graphics processor is irrelevant.

With these in mind, you’ll need to choose between Apple and Windows.

For Apple, I recommend (and use) an Air – https://www.apple.com/macbook-air/

For Windows, I use ASUS. Here’s a suitable version – https://www.amazon.com/ASUS-VivoBook-i7-1165G7-Fingerprint-S533EA-DH74/dp/B08KH4P5TL/

• Lightweight Perfect Interaction Honey Pots via Containerization
• Genetic Algorithms versus Tabu Search for Instruction Scheduling
• Computer-Aided Innovation with the Semantic Web
• CRAIG: A Practical Framework for Combining Instruction Scheduling and Register Assignment
• The Effect of Adding a Scalar D-Cache the to Cray-4 Vector Processor
• Dominator-Path Scheduling — A Global Scheduling Method
• Extending List Scheduling to Consider Execution Frequency
• Genetic Algorithms and Instruction Scheduling
• Building a Retargetable Local Instruction Scheduler
• Genetic Algorithms for Instruction Sequencing and Scheduling
• Lookahead Scheduling
• Motivation and Framework for Using Genetic Algorithms for Microcode Compaction
• List Scheduling: Alone, with Foresight and with Lookahead
• Using Genetic Algorithms to Fine-Tune Instruction-Scheduling Heuristics
• Instruction Scheduling Using Genetic Algorithms
• Instruction Scheduling Using Simulated Annealing
• ParsesraP: Using One Grammar to Specify both Input and Output
• Building a Retargetable Compiler for Instruction-Level Parallel Architectures
• A Technique for Tracing Memory Leaks in C++
• Register Allocation and Assignment in a Retargetable Microcode Compiler using Graph Coloring
• Post-Compaction Register Assignment in a Retargetable Compiler